profile-pic
Vetted Talent

Arun Pradhan

Vetted Talent
Hands on experience in Signal Processing (Audio, Acoustic, Speech, Image and Video, Physical Layer/Wireless-5G NR /CDMA2000 ),computer vision and Machine learning, Deep Learning & IoT aspirant in various domains ,contributed as Individual contributor , Technical leader and Architect. Comprehensive experience on requirement engineering, algorithm development, reference software modelling (fixed point and floating point ),porting, optimisation , validation , release package preparation and integration with various framework on various embedded Architectures (single core, heterogeneous and homogeneous Multi core SoC(VLIW, SIMD / Vectorisation, RISC ) targeted for real time application . Experience in DL interference implementation using TFLM and NN library . Co working with RTL experts for IP /accelerator development in FPGA /ASIC.
  • Role

    Audio Architect, Feature Engineering | Algorithm Engineer

  • Years of Experience

    20 years

Skillsets

  • Audio analytics
  • Acoustic algorithms
  • video processing
  • Testing and debugging
  • software optimization
  • mentoring teams
  • Iot architecture
  • Framework Design
  • Digital Health
  • Cross-functional Coordination
  • Biomedical Engineering
  • Deep Learning - 3 Years
  • Dsp software development
  • Physical layer algorithms
  • Wireless standards
  • Signal Processing
  • Machine Learning
  • Image Processing
  • Embedded Systems
  • Algorithm development
  • Computer Vision
  • Deep Learning - 3 Years

Vetted For

9Skills
  • Roles & Skills
  • Results
  • Details
  • icon-skill_image
    Senior Firmware EngineerAI Screening
  • 32%
    icon-arrow-down
  • Skills assessed :Cross-functional collaboration, CI/CD Pipeline, Embedded-C, Embedded Firmware Development, Firmware Testing, IoT, Problem Solving Attitude, Python, Strong Attention to Detail
  • Score: 29/90

Professional Summary

20Years
  • Nov, 2024 - Present1 yr 3 months

    Audio Architect and Feature Engineering Lead

    Visteon Corporation
  • Feb, 2024 - Nov, 2024 9 months

    Senior Principal Engineer Automotive Audio Specialist

    Fev India
  • Jan, 2024 - Jun, 2024 4 months

    Signal Processing Lead

    Paras Defence and Space Technologies Ltd
  • Dec, 2019 - Oct, 20211 yr 10 months

    Architect (Lead Consultant)

    Nokia Solution Network
  • Nov, 2021 - Apr, 2022 5 months

    Algorithm Developer (Consultant)

    Logitech Inc
  • May, 2022 - Nov, 20231 yr 5 months

    Senior Engineer (Audio Algorithm Engineering)

    Goodix Technology India Pvt Ltd
  • Jun, 2019 - Nov, 2019 5 months

    Consultant

    Innovision (Inceptor Technologies Pvt Ltd)
  • Apr, 2018 - May, 20191 yr 1 month

    Lead Algorithm Engineer

    ThinkLabs LLC
  • Jan, 2016 - Mar, 20182 yr 2 months

    Architect

    Harman Connected Services Pvt. Ltd.
  • Jun, 2013 - Jan, 2014 7 months

    DSP Architect (Consultant)

    Rebaca Technologies Pvt. Ltd.
  • Apr, 2014 - Mar, 2015 11 months

    Senior DSP Architect

    Videonetics Technologies Pvt. Ltd.
  • Apr, 2015 - Jan, 2016 9 months

    R & D Engineer - Expert

    Logic Fruit Technology Pvt. Ltd.
  • Jun, 2012 - May, 2013 11 months

    DSP Architect

    IB Technology

Applications & Tools Known

  • icon-tool

    Python

  • icon-tool

    OpenCV

  • icon-tool

    SDKs

  • icon-tool

    ARM

  • icon-tool

    CONFLUENCE

  • icon-tool

    SVN

  • icon-tool

    Azure ML Studio

  • icon-tool

    Anaconda

  • icon-tool

    PyCharm

  • icon-tool

    Labview

  • icon-tool

    MS VISIO

Work History

20Years

Audio Architect and Feature Engineering Lead

Visteon Corporation
Nov, 2024 - Present1 yr 3 months
    Responsible for Audio IP development including specification, algorithm and software development, porting, optimization, integration, tuning, and certification for various performance features. Collaborating with external stakeholders for evaluation and requirements clarification.

Senior Principal Engineer Automotive Audio Specialist

Fev India
Feb, 2024 - Nov, 2024 9 months
    Responsible for feature technical specifications, delivery evaluation from suppliers, design, and development. Worked with hardware and software suppliers for digital automotive e-cockpit systems of EV.

Signal Processing Lead

Paras Defence and Space Technologies Ltd
Jan, 2024 - Jun, 2024 4 months
    Led algorithm development, simulation, and performance evaluation for radar signal processing focusing on SAR image formation and ML-based object tracking.

Senior Engineer (Audio Algorithm Engineering)

Goodix Technology India Pvt Ltd
May, 2022 - Nov, 20231 yr 5 months
    Developed audio algorithms and embedded software for automotive platforms, focused on beamforming, noise reduction, and wakeup word detection optimization.

Algorithm Developer (Consultant)

Logitech Inc
Nov, 2021 - Apr, 2022 5 months
    Developed algorithms for beamforming, acoustic echo cancellation, and noise reduction for next-generation large-room video conferencing solutions.

Architect (Lead Consultant)

Nokia Solution Network
Dec, 2019 - Oct, 20211 yr 10 months
    Developed physical layer algorithms and fixed-point models for 5G NR channels. Supported debugging and validation efforts in real-world scenarios.

Consultant

Innovision (Inceptor Technologies Pvt Ltd)
Jun, 2019 - Nov, 2019 5 months
    Worked on the development of embedded DSP software for hearing aids utilizing machine learning and signal processing techniques.

Lead Algorithm Engineer

ThinkLabs LLC
Apr, 2018 - May, 20191 yr 1 month
    Contributed to signal processing and software engineering focused on body sound analytics, digital stethoscope technology, and IoT solutions.

Architect

Harman Connected Services Pvt. Ltd.
Jan, 2016 - Mar, 20182 yr 2 months
    Managed and designed algorithms for engine order cancellation, acoustic feedback integration in car audio systems, and media server enhancements for video conferencing applications.

R & D Engineer - Expert

Logic Fruit Technology Pvt. Ltd.
Apr, 2015 - Jan, 2016 9 months
    Worked as an expert in computer vision applications, contributing algorithms using OpenCV and QT framework for surveillance systems.

Senior DSP Architect

Videonetics Technologies Pvt. Ltd.
Apr, 2014 - Mar, 2015 11 months
    Focused on DSP architecture development for security and surveillance applications.

DSP Architect (Consultant)

Rebaca Technologies Pvt. Ltd.
Jun, 2013 - Jan, 2014 7 months
    Worked on embedded DSP architecture for consumer electronics applications.

DSP Architect

IB Technology
Jun, 2012 - May, 2013 11 months
    Architectural contributions to embedded signal processing projects for industrial clients.

Major Projects

7Projects

Digital Stethoscopes Body Sound Enhancement

    Developed state-of-art algorithm for ambient noise reduction, loudness improvement, and acoustic feedback cancellation for paying back body sound through the speaker; anomaly detection in body sound.

Extendable and Flexible Audio Framework for Automotive Amplifier

    Global Audio Amplifier framework design and demonstration on Multicore SoC (TI-Jacinto), porting and optimisation of HALOSONIC algorithms (EOC-Engine order cancellation, ESS) on NXP SoC/Dirana3, integration of Acoustic Feedback cancellation algorithm with car audio amplifier framework.

Virtual Microscope

    Developed 2D image stitching of large sets (e.g., 100x100) and software development in MATLAB/C/C++ for digital pathology applications.

Video Surveillance Application

    Developed video stitching and object tracking algorithm using advanced methods such as features - SIFT, SURF, HOG, Kalman, and Particle Filters for wide area visual surveillance applications.

Deep Learning-Based Audio Analytic Engine

    Designed and implemented an audio analytic engine that analyses abnormal sound detection, speech, and keyword spotting leveraging ML/DL approaches.

Video Collaboration Endpoint

Nov, 2021 - Apr, 2022 5 months
    Responsible for developing Audio Algorithm advancements (beamforming, ambient noise cancellation, AGC, equalizer) targeting large room video conferencing solutions on a Linux platform.

Next Generation Hearing-Aid

Jun, 2019 - Nov, 2019 5 months
    Worked on developing signal processing algorithm and embedded DSP software for affordable hearing aids leveraging embedded cores.

Education

  • MS in Signal Processing

    NTU (Nanyang Technological University), Singapore
  • Bachelor of Engineering (AMIE) in Electronics and Communication Engineering

    The Institute of Engineers, India
  • B.Sc. in Science

    University of Calcutta
  • Certificate in Computing for Artificial Intelligence and Machine Learning

    IISc
  • Post Graduate Diploma in Digital Health and Imaging

    IISc
  • Post Graduate Diploma in HW Design and System Electronics

    CEDTI, Mohali
  • Certificate in Deep Generative Models

  • Certificate

Certifications

  • Machine Learning of Sensory Signals (Video, Image, Speech, Audio) at Indian Institute of Science (IISc), Electrical Engineering Dept., Bangalore

AI-interview Questions & Answers

I have 20 years of experience in, uh, digital signal processing and embedded Software design, and I've experienced in various platforms, Uh, DSP, a risk score. I work in the domain of, uh, cable electronics, telecommunications, Automotive, defense and security. I work in the area of audio, acoustic speech, Competition, image processing, also in physical layer signal processing. I use language programming language c, c plus plus, MATLAB, sometimes Python. I love to design embedded systems, uh, to implement real time signal processing algorithms and integration into the framework to enable the applications.

The impact of this video on the system is a critical or noncritical, uh, for the performance of systems? Uh, performance I mean, here, functional performance and system performance, like, latency, and, you know, throughput and, uh, power efficiency? So What is that? Yeah, man. I cannot do this. Is it? No. I don't know.

Uh

Well, architecture should be scalable in terms of you know, It has to be, uh, first, implement the very basic functionalities of the computations, uh, that maps to the hardware architecture. I mean, the data path, uh, especially the instruction in top 226. Uh, so that in any kind of note code of computation, those are well optimized using the processor's instruction set. And then using those Low level functions, which has already been optimized in the 26, will be called or will be used to develop the, APIs and creative flow. Conditional code or control code does not need not to be optimized, but So we will design to handle the flow for that. You know? All the error Reporting and everything are taken care. And finally, these are, uh, these all these blocks will be integrated in terms of APIs to create a pipeline. And those sets of APIs have been provided, uh

Well, in a bit of software development, as I said, it Covers of, uh, interior, uh, functional timelines in terms of user stories And, uh, it's easiest to do this in terms of task, hence of task. And, uh, the task status would be reported in terms of, Completed or input. This are done. And this would be log attached to your 3 tasks. For test and debugging. And, Those who did peer reviewed by, uh, the team members. So, uh, every Task need to need to have short term score to have, uh, you know, continuously Lee evolving, uh, status, and it should be reviewed in Standard meeting, the status, and the failure of the blockage. So this would be some continuous flow of, uh, improving so that it should cover up all the subtask tasks, and he just wish to complete the whole, uh, uh, AS stories and the whole functional pipelines.

Here, the red lines would be fast, Uh, put before the right, and then right.

I don't understand this code snippet when it tries to do. Is this or What does it mean? I am not familiar with this kind of syntax at

Well, That's our tasks that we know, uh, reviewed, uh, because the functional terms as a peer review, This design review, code review, uh, and those would be the test design should be, uh, come from the other functional type of functional team to, for bot testing and the function of the functional, uh, features of other team. And those would be reviewed cost reviewed by other teams. 1 team developed a, Uh, features. Uh, other teams would view that, and test designs would come, uh, from the other team, And test report should be viewed by then. So this is one aspect I can see. And Yeah. I think this is one of the things I need to to develop it, uh, across Amazon teams. This would be continuously checked in and, you know, using the repo and should be Uh, thoroughly, you know, tested by the test plan, which is reviewed by the other team. And, uh, hardware also, you know, hardware, uh, first software to develop, we'll test it. A deviate level, then, um, subsystem level and system level. As you know, the as for the test plan, and then, uh, I need to put on the hardware before putting hardware. The complexity of the software need to be estimated in the simulator or whatever the profiling strategies so that it can fit into the existing memory footprint and cycles. It was a hardware. And, uh, the drivers and And I also be tested first, and then, uh, the processing code, and that's scheduling, uh, based on the articles news. Uh, so there will be some Systematic testing of the software, which is why we integrate in the hardware. So, Yeah. Uh, it's earlier with the approach. It will be taken care

Well, we can, uh, imply, uh, we can we can the binaries, uh, of embedded from where it need to be compressed using some HVD. And, uh, while putting out the need to be decompressed, error check, like, quality check, SCS, you know, uh, with before after it completes this. And then it, uh, add it to be bring it to the memory of the device