Putluru bhuvaneswari
Seeking position with an organization where I can contribute my skills for organization s success and synchronize with new technology while being resourceful, innovative and flexible.
- Role
FPGA Engineer
- Years of Experience
11.58 years
Skillsets
- Xilinx ISE
- SV
- TCL
- Ubuntu
- VCS
- Verilog
- VHDL
- Virtuoso
- Windows
- Spartan
- Xilinx Vivado
- Zybo
- Comsolmultiphysics
- Soc encounter
- Conformal-lec
- Sentuarus tcad
- Nano tcad vides
- Basys
- Dft compiler
- MySQL - 1 Years
- Java - 1 Years
- Postman
- Eclipse
- C
- Calibre
- CentOS
- Dc compiler
- MySQL - 1 Years
- MATLAB
- ModelSim
- Mysql workbench
- Ngspice
- PEX
- Questasim
- Rtl compiler
- Selenium ide
Professional Summary
11.58Years
- Aug, 2024 - Present1 yr 9 months
Design Verification Engineer
BITSILICA - Mar, 2022 - Aug, 2022 5 months
VLSI Frontend Training for freshers
VLSIGuru Training Institute - Oct, 2021 - Feb, 2022 4 months
FPGA Engineer
Synopsys Inc Student Volunteer
- Nov, 2019 - Nov, 20201 yr
Intern(Technical Engineering)
Synopsys Inc - Nov, 2020 - Sep, 2021 10 months
FPGA Engineer
ASCENT STAFFING SOLUTIONS PRIVATE LIMITED
Work History
11.58Years
Design Verification Engineer
BITSILICAAug, 2024 - Present1 yr 9 months
VLSI Frontend Training for freshers
VLSIGuru Training InstituteMar, 2022 - Aug, 2022 5 months
FPGA Engineer
Synopsys IncOct, 2021 - Feb, 2022 4 months
FPGA Engineer
ASCENT STAFFING SOLUTIONS PRIVATE LIMITEDNov, 2020 - Sep, 2021 10 months
Intern(Technical Engineering)
Synopsys IncNov, 2019 - Nov, 20201 yr
Student Volunteer
Achievements
- Implemented the features of AHB Interconnect like writing data to the address and reading from the same location using UVC TECHNICAL EXPERTISE Programming Languages: SV, Verilog, VHDL, Java, MySQL,
- Member of the System Administration team of the department.
- Being Part of SMDP Program in VNIT,
- Awarded Gold Medal for securing top marks in SSC at School Level
- Published Paper titled Climatology of Ionospheric Spatial Gradients over Equatorial and Low Latitude Regions , in International Journal of Science and Innovative Engineering & Technology, on 7th May 2017
- Achieved First Prize in Techtrix, conducted by Department of Electronics and Communication Engineering, on 8th March 2016
- Awarded Gold Medal for QUIZ conducted by VIHANG, Annual PG Sports & Cultural meet during 25-02-2019 and 04-03-2019 in VNIT Nagpur
- Awarded Bronze Medal for Cricket in VIHANG , Annual PG Sports & Cultural fest 2018 held in VNIT Nagpur
- Worked as Class Representative in CVN EXTRA CURRICULAR ACTIVITIES
- Volunteer in International Symposium on Semiconductor Materials and Devices(ISSMD) organized from 30 November to December,2018 at VNIT.
- Volunteer in Special ManPower Development Program organized from 24 September to 28 September,2018.
Major Projects
14Projects
Online Book Store
Jan, 2023 - Dec, 2023 11 months
The code can check registered students from the database. Search books based on author or ID, issue and return books, and update database copies accordingly.
Airplane-Reservation-System
Jan, 2023 - Dec, 2023 11 months
System allows users to login, enter travel details, view available flights, select seats, and process payments based on seat availability and options.
Student-Management-System
Jan, 2023 - Dec, 2023 11 months
Application to add student details, generate studentID, display available courses, enroll students, and manage tuition fee and status.
Film-Database
Jan, 2023 - Dec, 2023 11 months
Database system to display films by producer, list artists by year, sort films by stars, and update ratings for specific producers.
IEEE 802.15.4 MAC Protocol
Jan, 2019 - Dec, 2019 11 months
Designed MAC Protocol with UART interface, implemented MAC functionalities including CSMA/CA, CRC, GTS, transmission, reception, and security using VHDL and AES/PRESENT encryption.
D Flipflop
Jan, 2018 - Dec, 2018 11 months
Inserted single scan chain in synthesized D flipflop design using DFT Compiler and generated test vectors with Tetramax.
Dadda Multiplier
Jan, 2017 - Dec, 2017 11 months
Designed 8-bit multiplier using Verilog HDL, simulated with Xilinx Vivado, and implemented by ASIC flow using Cadence tools.
System Precharge and Driver circuit within SRAM Cell
Jan, 2017 - Dec, 2017 11 months
Designed and simulated precharge and driver circuit of SRAM cell using Cadence Virtuoso, verified with DRC, LVS, and PEX.
Climatology of ionospheric spatial Gradients over Equatorial and Low latitude regions
Jan, 2017 - Dec, 2017 11 months
Analyzed GNSS receiver data using MATLAB to establish ionospheric spatial gradient climatology for equatorial and low latitude regions.
Characterization of MOSCAP
Jan, 2017 - Dec, 2017 11 months
Plotted CV characteristics of MOSCAP using Keithley 4200 SCS and compared results with datasheet.
Performance analysis of Silicene Transistor
Jan, 2017 - Dec, 2017 11 months
Compared performance of silicene transistor by varying dielectric constants using Nano Tcad Vides simulation tool.
LNA Design
Jan, 2017 - Dec, 2017 11 months
Analyzed gain, input impedance, and noise figure of CMOS common gate low noise amplifier using Cadence Virtuoso and Spectre.
Inductor Design
Jan, 2017 - Dec, 2017 11 months
Designed an inductor using HFSS and obtained S parameters.
Automatic Water Irrigation System
Jan, 2016 - Dec, 2016 11 months
Sensor-based system to automate pump operation for regular plant watering, saving time for farmers.
Education
Master of Technology in VLSI Design
Visvesvaraya National Institute of Technology (2019)Bachelor of Technology, Electronics and Communication Engineering
G.Narayanamma Institute of Technology and Science (2017)Class XII (Intermediate)
Narayana Junior College (2013)Class X (SSC)
Priyadarsini Vidya Mandir (2011)
Certifications
VSD Physical Design Course in Udemy by Dr. Kunal Ghosh