• Company Industry

    Semiconductor Manufacturing

  • Headquarters

    5488 Marvell Lane, Santa Clara, - 95054, CA, US

About us

We believe that infrastructure powers progress. That execution is as essential as innovation. That better collaboration builds better technology. At Marvell, We go all in with you. Focused and determined, we unite behind your goals as our own. We leverage our unrivaled portfolio of infrastructure technology to identify the best solution for your unique needs. And we sit shoulder-to-shoulder with your teams to build it. Agile in our thinking, and our partnerships, we look for unexpected connections that deliver a competitive edge and reveal new opportunities. At Marvell, we’re driven by the belief that how we do things matters just as much as what we do. Because, with a foundation built on partnership, anything is possible.

Funding

Self-funded (bootstrapped) company without external investments.

Current Openings at Marvell Technology

Principal Validation Engineer

5 - 10 Years ExpOnsite - Pune
C/C++Embedded SWLinuxARMSOCDDRPCIE

Analog Layout Staff Engineer

6 - 10 Years ExpOnsite - Bengaluru
mixed-signalCadence VirtuosoAnalog LayoutFinfetverificationEDA toolsautomation

Analog IC Design Principal Engineer

10 - 15 Years ExpOnsite - Bengaluru
CMOSanalog circuitsMixed Signaldesign techniquesIC designLab TestingBicmos

Principal Engineering- Software Program Manager

5 Years ExpOnsite - Bengaluru
Program ManagementSoftware DevelopmentAgileJiraLeadershipProblem-solving

Senior Staff Software Development Engineer (C/C++, Network Drivers, Data plane, Crypto, Compiler)

5 - 10 Years ExpOnsite - Bengaluru
C/C++NetworkingCryptoAssemblyARMaccelerators

Project Analyst

7 Years ExpOnsite - Bengaluru
PowerBIMS ExcelPythonSQLVBASeatable

Technical Analyst – Supply Operations & Planning

10 Years ExpOnsite - Bengaluru
KinaxisSupply PlanningOracle ERPSQLAPISETLData Integration

Senior Staff Engineer - Design Verification - Ethernet

8 Years ExpOnsite - Pune
VerilogSystem VerilogUVMDebuggingverificationEthernet

Staff Analog Layout Engineer

6 - 10 Years ExpOnsite - Bengaluru
Analog LayoutCadence VirtuosoMentoringDRCLVSEMIRautomation

Memory Layout Staff Engineer

5 Years ExpOnsite - Bengaluru
Memory LayoutPhysical VerificationSemiconductorEDA toolsScriptinghigh-performancedesign rule

Senior Principal Engineer - RTL

20 Years ExpOnsite - Bengaluru
RTLVerilogSystem VerilogASICAIPythonIP integration

Senior Staff Engineer, RTL ASIC Design

8 Years ExpOnsite - Bengaluru
RTL designVerilogSystem VerilogASIC designpower analysisIP integrationPython

Senior Staff Engineer - Design Verification - SerDes/PHY/AMS

8 - 12 Years ExpOnsite - Bengaluru
SystemVerilogUVMverificationSerdesAMSmixed-signalFirmware

Principal Engineer- CAD/EDA Tools & Design Automation Engineer

12 Years ExpOnsite - Bengaluru
LinuxGitPythonJenkinsGitHub ActionsEDA toolsSynopsys VCS

Principal Technical Program Manager

15 Years ExpOnsite - Bengaluru
SoC DesignIP DesignProgram ManagementStakeholder ManagementProcess ImprovementProject Planning

Senior Principal Engineer Verification

18 Years ExpOnsite - Hyderabad
UVMARM ArchitectureAXI-4CHIACEDDRPCIE

Senior Staff Manager

15 - 18 Years ExpOnsite - Bengaluru
SystemVerilogUVMVerilogPerlPythonTCLAXI

Design Verification Principal Engineer - SOC

12 - 14 Years ExpOnsite - Hyderabad
System VerilogUVMIP verificationDV toolsmethodologiesProject Planningdebug capabilities

Principal Engineer - Design Verification

12 Years ExpOnsite - Hyderabad
ARM-based SoCARM boot sequencesARM ArchitectureAMBA BusAXI-4CHIACE

Principal Engineer DV

FreshersOnsite - Bengaluru
SoC verificationsubsystem verificationUVMARM ArchitectureAXI-4CHIACE

Senior Staff Engineer DV

FreshersOnsite - Bengaluru
SoC verificationUVMARM ArchitectureAXI-4CHIACEDDR

Sr Staff Manager DDR/HBM

18 Years ExpOnsite - Bengaluru
ASIC developmentSystemVerilogRTL designDDR4/5LPDDR4/5XHBM3Perl

Senior Staff Engineer - Design Verification

6 - 8 Years ExpOnsite - Bengaluru
VerilogSystemVerilogUVMC/C++IP verificationObject-Oriented Programmingcoverage analysis

Sr. Principal Design Verification Engineer (PCIe/CXL)

18 Years ExpOnsite - Bengaluru
UVMPCIECXLAXI-4VerilogSystemVerilogGit

Senior Principal Engineer, RTL ASIC Design

18 Years ExpOnsite - Bengaluru
RTLASIC designPythonTCLShellC++EDA tools

Frontend Infrastructure CAD/Tools Engineer

5 Years ExpOnsite - Bengaluru
PythonPerlEDA toolsGitGithubAI integrationLLM

Director Engineering

16 Years ExpOnsite - Hyderabad
RTLDVSOCemulationverificationprocessor architectureSOC components

Principal Engineer

8 Years ExpOnsite - Bengaluru
UVMSystem VerilogVerilogC++UnixLinuxPython

Senior Engineer - DFT

FreshersOnsite - Bengaluru
Dft fundamentalsMemory BISTscan

Senior Staff Verification Engineer

8 Years ExpOnsite - Pune
SystemVerilogHDLUVMARM M series ProcessorsPerlShellPython

Principal Engineer (L2, L3 Protocol Development, Switching/Routing)

8 - 15 Years ExpOnsite - Bengaluru
C/C++PythonEthernet SwitchingRouting ProtocolsEmbedded SystemsLinuxnetwork software

Staff Engineer - Subsystem CoE Emulation

3 Years ExpOnsite - Bengaluru
SOC emulationPCIECXLEthernetDDRHBMPython

Principal Engineer - Subsystem CoE Emulation

12 Years ExpOnsite - Bengaluru
SOC emulationPCIECXLEthernetDDRHBMUSB 3.0

Senior Staff Engineer - Subsystem CoE Emulation

8 Years ExpOnsite - Bengaluru
SOC emulationvalidationDebugPCIECXLEthernetDDR

Senior Principal Engineer, Subsystem CoE Emulation

15 - 18 Years ExpOnsite - Bengaluru
SOC emulationPCIECXLEthernetDDRHBMPython

Senior Staff Manager Subsystem CoE Emulation

12 Years ExpOnsite - Bengaluru
Digital ic designRTL designlogic synthesisTiming AnalysisFormal VerificationSOC emulationPython

Senior Staff Engineer

5 - 20 Years ExpOnsite - Hyderabad
PCIENVMeCLinuxkerneldriversNetworking

Director, Engineering IT

15 Years ExpOnsite - Bengaluru
HPCEDA toolscloud platformsAWSGCPAzureITIL

Staff/Sr. Staff Field Applications Engineer (Networking)

6 - 10 Years ExpOnsite - Bengaluru
CC++L2 switchingRouting ProtocolsDebuggingcomputer networking

Staff to Senior Staff Engineer Design Verification

3 Years ExpOnsite - Bengaluru
SystemVerilogUVMAMBA protocolsAXIAHBAPBVerdi

Senior SQA Manager (C. C++, Python, CXL, PCIE)

10 - 15 Years ExpOnsite - Hyderabad
PythonpytestC++CI/CDDebuggingGithub

Principal SQA Engineer (L2, L3, Python Automation)

10 - 20 Years ExpOnsite - Bengaluru
PythonL2/L3NetworkingQA methodologiesTest PlanningLinux/UnixTraffic generators

Senior Staff Manager

12 - 18 Years ExpOnsite - Pune
VerilogSystemVerilogNOCAXIAHBSynopsysCadence

Senior Staff Engineer - RTL Design

8 Years ExpOnsite - Pune
System VerilogVerilogScriptingASIC designRTL codingprocessorhardware security

Sr. Staff Manager (Storage Protocol/ Fibre Channel Architecture & Development)

15 Years ExpOnsite - Pune
CLinuxNVMeSCSIKernel ProgrammingAPI LibrariesStorage protocols

Workday Operations Specialist

4 Years ExpOnsite - Hyderabad
WorkdayHCMEIBAnalyticalSecurityProblem-solvingData

Director, Design Verification

15 Years ExpOnsite - Hyderabad
emulationverification infrastructureIPsubsystemSOCSemiconductor VerificationChiplet

Staff/Sr. Staff Field Applications Engineer(Switching)

6 - 10 Years ExpHybrid - Bengaluru
CC++L2 switchingRoutingVLANSTPNetworking

Senior Staff Engineer- PCIe Driver/ Linux Kernel Driver Development

6 Years ExpOnsite - Hyderabad
PCIECLinux kernelC++PythonGit

Sr Staff Firmware Engineer

5 - 10 Years ExpOnsite - Pune
C/C++Cryptographic technologiesJTAGPCIE protocolSMBUSARM-based CPU architecturesIPsec accelerators

Director, IT Enterprise Applications & Platforms

15 Years ExpOnsite - Bengaluru
ERPIntegration PlatformsServiceNowCI/CDDevOpsenterprise architecturePlatform Engineering

Senior Staff/Principal SQA Engineer (Firmware/Embedded Testing, C/C++, Python/Bash)

7 - 15 Years ExpOnsite - Hyderabad
C/C++PythonBashFirmwareEmbedded TestingHardware debuggingGit

Staff/Sr. Staff Field Applications Engineer

7 - 12 Years ExpOnsite - Bengaluru
C languageLinuxdriversDebuggingFirmwareWindows BIOSstorage ASICs

Staff Verification Engineer- PCIe/UALink/CXL

3 - 5 Years ExpOnsite - Bengaluru
System VerilogUVMPythonVerilogTCLPerlPCIE

Design Verification Principal Engineer

12 Years ExpOnsite - Bengaluru
SoC verificationARM ArchitectureUVM testbenchC codingEthernetPCIEDebugging

Staff/ Senior Staff QA Engineer (C. C++, Python, CXL, PCIE)

4 - 10 Years ExpHybrid - Hyderabad
PythonC/C++pytestCXLPCIEgtestCI/CD

Principal Design Verification Engineer

10 Years ExpOnsite - Bengaluru
System VerilogUVMPythonPerlEDA VerificationObject-Oriented DesignLinux

Senior Staff Simulation Engineer

8 - 12 Years ExpOnsite - Pune
PythonC++ARMRISC-VVirtualizerSimicsQEMU

Senior Staff Manager Firmware Development

15 Years ExpOnsite - Hyderabad
CC++PythonEmbedded firmwarePCIENVMeARM

Staff Engineer – Application( VC++, MFC ) and Firmware Development

3 Years ExpOnsite - Bengaluru
VC++MFCC++GitJiraEmbedded Systems

Principal Engineer- Design Verification

10 Years ExpOnsite - Bengaluru
System VerilogUVMPythonC++PerlLinuxEDA tools

Software Engineer (L1, L2, L3, C, Linux, DPDK, Switch)

4 - 12 Years ExpOnsite - Hyderabad
PythonC++CDPDKLinuxSwitching

Windows Device Driver Developer

2 - 10 Years ExpOnsite - Pune
CWindows Device DriversKernel ProgrammingStorage protocolsUNIX OS internalRemote procedure callsHost CLI

Staff to Senior Staff Design Verification Engineer (DDR/LPDDR/HBM)

4 Years ExpOnsite - Bengaluru
System VerilogUVMPythonC++

AI Developer Platforms (Security)

5 - 10 Years ExpOnsite - Hyderabad
PythonC++AICRustCI/CDautomation

Architecture Simulation & Validation Architect (L2, L3, C/C++, Python automation, Device modeling)

7 - 20 Years ExpOnsite - Bengaluru
PythonNetworkingvalidationC++Cmodelingautomation

Principal Validation Engineer

10 Years ExpOnsite - Pune
NANDSSDPCIEFirmwareC/C++ARM assemblyDebugging

Senior Staff AI/ML Scale Engineer

4 - 12 Years ExpOnsite - Hyderabad
PythonC++AI/MLNetworkingTCP/IPPyTorchTensorFlow

Senior Principal Security Engineer– HSM & Cryptography

17 Years ExpOnsite - Bengaluru
HSMCryptographyAgileC++CAPISCI/CD

Security Developer (C, Linux, System Security, Embedded programming)

8 - 12 Years ExpOnsite - Hyderabad
CLinuxMultithreadingMultiprocessorstatic analysisValgrindgcov

Principal Switch Architect

8 - 10 Years ExpOnsite - Bengaluru
CC++PythonLayer 2Layer 3QOSmicro-architecture

Staff Engineer- Physical Design

4 - 8 Years ExpOnsite - Bengaluru
PerlTCLPythonCadence InnovusSynopsys FCVerilogVHDL

Senior Staff Engineer-Physical Design

8 - 12 Years ExpOnsite - Bengaluru
Cadence InnovusSynopsys FCPerlTCLPythonVerilogVHDL

Cyber Security Operations Analyst (Tier 2 SOC)

4 Years ExpHybrid - Hyderabad
IDS/IPSNGFWEDRSIEMvulnerability scannersHIDS/HIPSAV

Principal Engineer - DFT

13 - 15 Years ExpOnsite - Bengaluru
MBISTATPGvalidationSTAIP-DFXPost-Silicon bringupSCAN-Insertion

Windows Device Driver Developer

2 - 10 Years ExpOnsite - Pune
CStorage protocolsKernel ProgrammingWindows device driverUnix OSFCStorage Drivers